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79 lines
4.0 KiB
Markdown
79 lines
4.0 KiB
Markdown
# SpinalHDL Base Project
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This repository is a base project to help Spinal users set-up project without knowledge about Scala and SBT.
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## If it is your are learning SpinalHDL
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You can follow the tutorial on the [Getting Started](https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Getting%20Started/index.html) page.
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More specifically:
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* instructions to install tools can be found on the [Install and setup](https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Getting%20Started/Install%20and%20setup.html#install-and-setup) page
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* instructions to get this repository locally are available in the [Create a SpinalHDL project](https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Getting%20Started/Install%20and%20setup.html#create-a-spinalhdl-project) section.
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### TL;DR Things have arleady been set up in my environment, how do I run things to try SpinalHDL?
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Once in the `SpinalTemplateSbt` directory, when tools are installed, the commands below can be run to use `sbt`.
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```sh
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// To generate the Verilog from the example
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sbt "runMain projectname.MyTopLevelVerilog"
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// To generate the VHDL from the example
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sbt "runMain projectname.MyTopLevelVhdl"
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// To run the testbench
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sbt "runMain projectname.MyTopLevelSim"
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```
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* The example hardware description is into `hw/spinal/projectname/MyTopLevel.scala`
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* The testbench is into `hw/spinal/projectname/MyTopLevelSim.scala`
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When you really start working with SpinalHDL, it is recommended (both for comfort and efficiency) to use an IDE, see the [Getting started](https://spinalhdl.github.io/SpinalDoc-RTD/master/SpinalHDL/Getting%20Started/index.html).
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## If you want to create a new project from this template
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### Change project name
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You might want to change the project name, which is currently `projectname`. To do so (let's say your actual project name is `myproject`; it must be all lowercase with no separators):
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* Update `build.sbt` and/or `build.sc` by replacing `projectname` by the name of your project `myproject` (1 occurrence in each file). The better is to replace in both (it will always work), but in some contexts you can keep only one of these two files:
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* If you are sure all people only use `sbt`, you can replace only in `build.sbt` and remove `build.sc`
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* If you are sure all people only use `mill`, you can replace only in `build.sc` and remove `build.sbt`
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* Replace in both files for open-source project.
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* Put all your scala files into `hw/spinal/myproject/` (remove the unused `hw/spinal/projectname/` folder)
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* Start all your scala files with `package myproject`
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### Change project structure
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You can change the project structure as you want. The only restrictions (from Scala environment) are (let's say your actual project name is `myproject`):
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* you must have a `myproject` folder and files in it must start with `package myproject`
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* if you have a file in a subfolder `myproject/somepackage/MyElement.scala` it must start with `package myproject.somepackage`.
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* `sbt` and `mill` must be run right in the folder containing their configurations (recommended to not move these files)
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Once the project structure is modified, update configurations:
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* In `build.sbt` and/or `build.sc` (see above) replace `/ "hw" / "spinal"` by the new path to the folder containing the `myproject` folder.
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* In the spinal configuration file (if you kept it, by default it is in `projectname/Config.scala`) change the path in `targetDirectory = "hw/gen"` to the directory where you want generated files to be written. If you don't use a config or if it doesn't contain this element, generated files will be written in the root directory.
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## Mill Support (Experimental)
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The [Mill build tool](https://com-lihaoyi.github.io/mill) can be installed and used instead of `sbt`.
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```sh
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// To generate the Verilog from the example
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mill projectname.runMain projectname.MyTopLevelVerilog
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// To generate the VHDL from the example
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mill projectname.runMain projectname.MyTopLevelVhdl
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// To run the testbench
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mill projectname.runMain projectname.MyTopLevelSim
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```
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