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SpinalHDL 1.6.0

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name1e5s
2021-07-16 20:10:07 +08:00
parent 5502e4f7f6
commit 2e50a23fcc
3 changed files with 5 additions and 5 deletions
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6
src/main/scala/mylib/MyTopLevel.scala
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@@ -26,9 +26,9 @@ import scala.util.Random
//Hardware definition
class MyTopLevel extends Component {
val io = new Bundle {
val cond0 = in Bool
val cond1 = in Bool
val flag = out Bool
val cond0 = in Bool()
val cond1 = in Bool()
val flag = out Bool()
val state = out UInt(8 bits)
}
val counter = Reg(UInt(8 bits)) init(0)