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update 1.0.2

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Dolu1990
2017-12-19 00:12:02 +01:00
parent 866719bd0e
commit 43c46edec8
3 changed files with 9 additions and 19 deletions
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4
build.sbt
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@@ -7,8 +7,8 @@ scalaVersion := "2.11.6"
EclipseKeys.withSource := true EclipseKeys.withSource := true
libraryDependencies ++= Seq( libraryDependencies ++= Seq(
"com.github.spinalhdl" % "spinalhdl-core_2.11" % "latest.release", "com.github.spinalhdl" % "spinalhdl-core_2.11" % "1.0.2",
"com.github.spinalhdl" % "spinalhdl-lib_2.11" % "latest.release" "com.github.spinalhdl" % "spinalhdl-lib_2.11" % "1.0.2"
) )
addCompilerPlugin("org.scala-lang.plugins" % "scala-continuations-plugin_2.11.6" % "1.0.2") addCompilerPlugin("org.scala-lang.plugins" % "scala-continuations-plugin_2.11.6" % "1.0.2")

2
src/main/scala/mylib/MyTopLevel.scala
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@@ -20,8 +20,6 @@ package mylib
import spinal.core._ import spinal.core._
import spinal.lib._ import spinal.lib._
import spinal.sim._
import spinal.core.SimManagedApi._
import scala.util.Random import scala.util.Random

22
src/main/scala/mylib/MyTopLevelSim.scala
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@@ -2,7 +2,7 @@ package mylib
import spinal.core._ import spinal.core._
import spinal.sim._ import spinal.sim._
import spinal.core.SimManagedApi._ import spinal.core.sim._
import scala.util.Random import scala.util.Random
@@ -13,24 +13,14 @@ object MyTopLevelSim {
SimConfig(new MyTopLevel).withWave.doManagedSim{dut => SimConfig(new MyTopLevel).withWave.doManagedSim{dut =>
//Fork a process to generate the reset and the clock on the dut //Fork a process to generate the reset and the clock on the dut
fork{ dut.clockDomain.forkStimulus(period = 10)
dut.clockDomain.assertReset()
dut.clockDomain.fallingEdge()
sleep(10)
dut.clockDomain.disassertReset()
sleep(10)
while(true){
dut.clockDomain.clockToggle()
sleep(5)
}
}
var modelState = 0
var idx = 0 var idx = 0
while(idx < 100){ while(idx < 100){
//Generate random values to drive the reference model and the dut //Generate random values to drive the reference model and the dut
val cond0, cond1 = Random.nextBoolean() val cond0, cond1 = Random.nextBoolean()
val oldState = dut.io.state.toInt
//Drive the dut inputs //Drive the dut inputs
dut.io.cond0 #= cond0 dut.io.cond0 #= cond0
@@ -39,9 +29,11 @@ object MyTopLevelSim {
//Wait a rising edge on the clock //Wait a rising edge on the clock
dut.clockDomain.waitRisingEdge() dut.clockDomain.waitRisingEdge()
//Calculate the reference model values //Update the reference model values
val modelState = if(cond0) (oldState + 1) & 0xFF else oldState
val modelFlag = modelState == 0 || cond1 val modelFlag = modelState == 0 || cond1
if(cond0) {
modelState = (modelState + 1) & 0xFF
}
//Check that the dut values match with the reference model ones //Check that the dut values match with the reference model ones
assert(dut.io.state.toInt == modelState) assert(dut.io.state.toInt == modelState)